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Xilinx:Viterbi Decoder
类型:软IP
简短描述:DSP/Error Correction
详细描述:The Viterbi Decoder module achieves decoding rates of 199 MSPS for a single channel and 273 MSPS for multi-channel designs. The multi-channel mode enables the decoding of up to 32 interlaced channels with a single Viterbi core. The core supports Trellis Coded Modulation and has a Best State calculation for lower latency and improved BER. It provides a serial architecture for area and a parallel architecture for high speed. The core has soft decision with parameterizable soft width. It allows a single decoder to decode two data rates. It also supplies added flexibility for handling erasures for dynamic adjustment of the code rate. The core supports code rates from 1/2 up to 1/7. It has a parameterizable constraint length, convolutional codes, traceback length, and puncture codes.
工艺:0.25um
代工厂:
应用:
特色:

    Xilinx:Turbo Product Code (TPC) Encoder
    Xilinx:Viterbi Decoder, (IEEE 802-Compatible)
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